Segmenting variable length frames into fixed length cells or reassembling variable length frames from fixed length cells is handled today on network node adapters. The conversion from variable length frame to fixed length cells is commonly called segmenting even if the frame length is longer or smaller than the cell length. Similarly, reassembly is used when one uses fixed length cells to rebuild the variable length frame whatever the size of the cells compared to the size of the frame. If the frame segment length is smaller than the cell size, two frames segments can be packed into one cell. This will save bandwidth since it prevents sending a cell that is not entirely filled with frame data.
For this invention, the variable length frames can be any length and any protocol (Ethernet, Token Ring, or others). The fixed length cells are 4 column by 16 row cells (64 units total) where units can be either in bits, bytes or any multiplier of bits or bytes. For simplicity, bytes will be used from now on. Each cell will have a 6 byte cell header. An optional 10 byte frame header can also be used after the cell header of the first cell. The contents and format of the cell and frame header and frame segment is not important for this invention. An example of a 64 byte fixed length cell is the cell length used with the IBM PRIZMA multiprotocol switch.
One case of segmenting variable length frames into fixed length cells is having to perform network protocol conversions when routing traffic from one network port to another. This is the case when variable length frames (such as Ethernet or Token-Ring frames) are received on an input LAN network line of an adapter and are routed to another output port as fixed length PRIZMA cells on the same adapter. Another case applies to a network node comprising a switching fabric supporting fixed length cells. The LAN frames received from LAN network lines need to be converted into fixed length PRIZMA cells before being sent to the bus of the switch fabric which will switch the cells toward a separate target adapter or blades. A variation of both these cases is to have a fixed length ATM cell and convert into a fixed length PRIZMA cell.
As these segmenting or reassembly functions are always used in network equipment and should sustain media speed or the switch fabric speed, the network equipment manufacturers usually try to optimize the design of such functions. More particularly, in the implementation of the segmenting function, the data movement from the buffers storing the data received from the network lines toward the cell buffer must be optimized.
The background art with segmenting and reassembly comprises hardware oriented solutions using a non-negligible number of pointers and counters. To move the frame that has been received and buffered in the input buffer of a network equipment, pointers and counters are needed for keeping track of the data movement. Pointers are needed, for instance, to point to the offset in the input buffer of the next data to be moved to the output buffer and to point to the last data moved in the input buffer. Similarly, counters are needed to store the number of bits or bytes of the cell or the frame or the headers to be moved or already moved. The same needs for counters and pointers occurs when one wants to reassemble the frames. In U.S. Pat. No. 5,375,121, the flow chart of the cell assembly method illustrated in FIG. 10 for converting network data into fixed length ATM cells, uses a significant number of pointers and counters. This has the inconvenience of using storage space and providing a complex process to coordinate all these counters.
The conversion from variable length frame to fixed length cells is commonly called segmenting either if the frame length is longer or smaller than the cell length. Similarly, reassembly is used when one used fixed length cells to rebuild the variable length frame whatever the size of the cells compared to the size of the frame. If the frame length is smaller than the cell size, the frame will be packed in cells.
Particularly, it the apparatus is integrated on a chip, the greater the number of pointers and counters, the more space for gates (conditional logic and registers) and electrical power are needed on that chip. It is well known that for integration on a chip, the electrical power needed and the number of gates must be limited. Network chip manufacturers have thus to avoid such disadvantages to make competitive components.